Odds are, unless of course you’re already within the semiconductor industry, you most likely haven’t heard about the word “RISC-V” or understand what the letters are a symbol of. Odds are, if you are much like me and blindly have confidence in the strength of phonetics, you will possibly not even understand how to pronounce RISC-V.
Initially when i first met with Professor Krste Asanovic, the mind of RISC-V.org, on Berkeley’s glorious grounds, I began by saying something highly eloquent. Something similar to, “So, Mr. Researcher. Let me know what you understand this ‘risk vee’ stuff.”
“Uhh, it’s pronounced ‘five.’” Eloquence everywhere.
“What’s that? Five what?”
“Risk five. RISC-V.”
I did not talk much after that, yet Professor Asanovic was still being kind enough to carry my hands and walk me with an sea of questions.
Things I then thought would be considered a straightforward research study right into a new micro-processor technology wound up opening a can of worms (along with a couple Coursera courses of instruction for computer architecture) that convinced me we’re around the fringe of a brand new wave of plastic innovation, and witness to the type of semiconductor companies we haven’t seen for some time within Plastic Valley. Because the traditional days, when band gaps meant something . Putting the Plastic in Plastic Valley.
To put it simply, RISC-V is definitely an open-source instruction set architecture (particularly, Reduced Instruction Set Computing, hence RISC), defining the “rules” for software packages to talk with the physical aspects of microprocessors like memory and logic units. It’s a significant threat for incumbent semiconductor firms that strive to promote incremental gains within their proprietary technology while protecting it from competitors and innovation through vast IP portfolios.
While a wide open source instruction set will be a boon for semiconductor designers focusing on new compute applications like AR, VR, and machine learning, this sort of implementation in the market needs a universe of support and fabrication services, a unified effort across engineering and style abilities not just in build functional RISC-V processor but to ramp and integrate them into servers and devices.
The RISC-V concept launched from UC Berkeley way, in 2010. Check out the ecosystem built round the RISC-V community which has risen from nothing in under 8 years:
Space Robotics (live public talk)
- luis bito: the same chie curiosity doing 15-year-old. NASA loss time and money in built machine everything is same methods what is built some structure for buit giant spaceship o catch lot trash space junk used fo buit new space ship
- Christian Bertram: Very cool talk! Great to see a good handful of super cool tech. #mechanicalEngineer
- Heu Valadao: so good!